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Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
DESCRIPTION
Monolithic temperature and overload protected power switch based on MOSFET technology in a 5 pin plastic envelope, configured as a single high side switch.
BUK200-50Y
QUICK REFERENCE DATA
SYMBOL IL SYMBOL PARAMETER Nominal load current (ISO) PARAMETER Continuous off-state supply voltage Continuous load current Continuous junction temperature On-state resistance MIN. 3.5 MAX. 50 10 150 100 UNIT A UNIT V A C m
APPLICATIONS
General controller for driving lamps, motors, solenoids, heaters. VBG IL Tj RON
FEATURES
Vertical power DMOS switch Low on-state resistance 5 V logic compatible input Overtemperature protection self resets with hysteresis Overload protection against short circuit load with output current limiting; latched - reset by input High supply voltage load protection Supply undervoltage lock out Status indication for overload protection activated Diagnostic status indication of open circuit load Very low quiescent current Voltage clamping for turn off of inductive loads ESD protection on all pins Reverse battery and overvoltage protection
FUNCTIONAL BLOCK DIAGRAM
BATT STATUS POWER MOSFET CONTROL & PROTECTION CIRCUITS LOAD GROUND RG
INPUT
Fig.1. Elements of the TOPFET HSS with internal ground resistor.
PINNING - SOT263
PIN 1 2 3 4 5 tab DESCRIPTION Ground Input Battery (+ve supply) Status Load
PIN CONFIGURATION
tab
SYMBOL
I S
1 2345
B
TOPFET HSS
G
L
leadform 263-01
Fig. 2.
connected to pin 3
Fig. 3.
April 1995
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VBG PARAMETER Battery voltages Continuous off-state supply voltage Reverse battery voltages1 Repetitive peak supply voltage Continuous reverse supply voltage Continuous load current Total power dissipation Storage temperature Continuous junction temperature2 Lead temperature Input and status Continuous input current Continuous status current Repetitive peak input current Repetitive peak status current Inductive load clamping EBL Non-repetitive clamping energy Tmb = 150 C prior to turn-off CONDITIONS External resistors: RI = RS 4.7 k, 0.1 RI = RS 4.7 k Tmb 115 C Tmb 25 C during soldering MIN. 0
BUK200-50Y
MAX. 50
UNIT V
-VBG -VBG IL PD Tstg Tj Tsold
-55 -
32 16 10 62.5 175 150 250
V V A W C C C
II IS II IS
0.1 0.1
-5 -5 -20 -20
5 5 20 20
mA mA mA mA
1.2
J
ESD LIMITING VALUE
SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model; C = 250 pF; R = 1.5 k MIN. MAX. 2 UNIT kV
THERMAL CHARACTERISTICS
SYMBOL PARAMETER Thermal resistance Rth j-mb Rth j-a
3
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Junction to mounting base Junction to ambient
in free air
-
1.5 60
2 75
K/W K/W
1 Reverse battery voltage is allowed only with external input and status resistors to limit the currents to a safe value. 2 For normal continuous operation. A higher Tj is allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates to protect the switch. 3 Of the output Power MOS transistor.
April 1995
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
STATIC CHARACTERISTICS
Tmb = 25 C unless otherwise stated SYMBOL VBG VBL -VLG PARAMETER Clamping voltages Battery to ground Battery to load Negative load to ground Supply voltage Operating range1 Currents IL IB IG IL RON RON RG Nominal load current Quiescent current3
2
BUK200-50Y
CONDITIONS IG = 1 mA IL = IG = 1 mA IL = 1 mA battery to ground VBG = 13 V VBL = 0.5 V; Tmb = 85 C VIG = 0 V; VLG = 0 V VIG = 5 V; IL = 0 A VBL = 13 V; VIG = 0 V VBG = 13 V; IL = 5 A; tp = 300 s VBG = 5 V; IL = 1 A; tp = 300 s IG = 10 mA
MIN. 50 50 12
TYP. 55 55 17
MAX. 65 65 21
UNIT V V V
VBG
5
-
40
V
3.5 1.5 -
0.1 2.2 0.1
2 4 1
A A mA A
Operating current4 Off-state load current5 Resistances On-state resistance6 On-state resistance Internal ground resistance
-
77 116 150
100 150 -
m m
INPUT CHARACTERISTICS
Tmb = 25 C; VBG = 13 V SYMBOL II VIG VIG(ON) VIG(OFF) PARAMETER Input current Input clamping voltage Input turn-on threshold voltage Input turn-off threshold voltage CONDITIONS VIG = 5 V II = 200 A MIN. 35 6 1.5 TYP. 60 7.5 2.1 2 MAX. 100 8.5 2.7 UNIT A V V V
1 On-state resistance is increased if the supply voltage is less than 9 V. Refer to figure 8. 2 Defined as in ISO 10483-1. 3 This is the continuous current drawn from the battery when the input is low and includes leakage current to the load. 4 This is the continuous current drawn from the battery with no load connected, but with the input high. 5 The measured current is in the load pin only. 6 The supply and input voltage for the RON tests are continuous. The specified pulse duration tp refers only to the applied load current.
April 1995
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
PROTECTION FUNCTIONS AND STATUS INDICATIONS
Truth table for normal, open-circuit load and overload conditions and abnormal supply voltages. FUNCTIONS SYMBOL CONDITION Normal on-state Normal off-state IL(OC) Open circuit load1 Open circuit load Tj(TO) Over temperature2 Over temperature3 VBL(TO) Short circuit load4 Short circuit load VBG(TO) VBG(LP) Low supply voltage5 High supply voltage6 INPUT 1 0 1 0 1 0 1 0 X X TRUTH TABLE STATUS 1 1 0 1 0 0 0 1 1 1 OUTPUT 1 0 1 0 0 0 0 0 0 0 3 40 4 45 8.5 150 50
BUK200-50Y
THRESHOLD MIN. TYP. MAX. UNIT
200
350
mA
175
-
C
10.3
12
V
5 50
V V
For input `0' equals low, `1' equals high, `X' equals don't care. For status `0' equals low, `1' equals open or high. For output switch `0' equals off, `1' equals on.
STATUS CHARACTERISTICS
Tmb = 25 C. The status output is an open drain transistor, and requires an external pull-up circuit to indicate a logic high. SYMBOL VSG VSG IS IS PARAMETER Status clamping voltage Status low voltage Status leakage current Status saturation current7 Application information External pull-up resistor8 CONDITIONS IS = 100 A; VIG = 0 V IS = 50 A; VBG = 13 V; VIG = 5 V VSG = 5 V VSS = 5 V; RS = 0 ; VBG = 13 V MIN. 6 TYP. 7 0.7 0.1 5 MAX. 8 0.8 1 UNIT V V A mA
RS
VSS = 5 V
-
100
-
k
1 In the on-state, the switch detects whether the load current is less than the quoted open load threshold current. This is for status indication only. Typical hysteresis equals 80 mA. The thresholds are specified for supply voltage within the normal working range. 2 After cooling below the reset temperature the switch will resume normal operation. The reset temperature is lower than the trip temperature by typically 10 C. 3 If the overtemperature protection has operated, status remains low to indicate the overtemperature condition even if the input is taken low, providing the device has not cooled below the reset temperature. 4 After short circuit protection has operated, the input voltage must be toggled low for the switch to resume normal operation. 5 Undervoltage sensor causes the device to switch off. Typical hysteresis equals 0.7 V. 6 Overvoltage sensor causes the device to switch off to protect the load. Typical hysteresis equals 1.3 V. 7 In a fault condition with the pull-up resistor short circuited while the status transistor is conducting. 8 The pull-up resistor also protects the status pin during reverse battery conditions.
April 1995
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
DYNAMIC CHARACTERISTICS
Tmb = 25 C; VBG = 13 V SYMBOL -VLG PARAMETER Inductive load turn-off Negative load voltage1 Short circuit load protection2 Response time Load current prior to turn-off Overload protection3 Load current limiting CONDITIONS VIG = 0 V; IL = 5 A; tp = 300 s VIG = 5 V; RL 10 m t < td sc VBL = 8.5 V; tp = 300 s 90 35 MIN. 15
BUK200-50Y
TYP. 20
MAX. 25
UNIT V s A
td sc IL
-
IL(lim)
23
33
43
A
SWITCHING CHARACTERISTICS
Tmb = 25 C, VBG = 13 V, for resistive load RL = 13 . SYMBOL td on dV/dton t on PARAMETER During turn-on Delay time Rate of rise of load voltage Total switching time During turn-off Delay time Rate of fall of load voltage Total switching time CONDITIONS to VIG = 5 V to 10% VL 16 1 40 2.5 s V/s s s V/s s MIN. TYP. MAX. UNIT
to 90% VL to VIG = 0 V to 90% VL to 10% VL
td off dV/dtoff t off
-
30 1.2 50
2.5 -
CAPACITANCES
Tmb = 25 C; f = 1 MHz; VIG = 0 V SYMBOL Cig Cbl Csg PARAMETER Input capacitance Output capacitance Status capacitance CONDITIONS VBG = 13 V VBL = VBG = 13 V VSG = 5 V MIN. TYP. 15 330 11 MAX. 20 460 15 UNIT pF pF pF
1 For a high side switch, the load pin voltage goes negative with respect to ground during the turn-off of an inductive load. This negative voltage is clamped by the device. 2 The load current is self-limited during the response time for short circuit load protection. Response time is measured from when input goes high. 3 If the load resistance is low, but not a complete short circuit, such that the on-state voltage remains less than VBL(TO), the device remains in current limiting until the overtemperature protection operates.
April 1995
5
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
BUK200-50Y
20
VBL IB II I VBG VSG RS IG IS S VIG B TOPFET HSS G IL L VLG LOAD
IL / A VBG / V = 13 7
BUK200-50Y 6
15
5
10
5
0 0 0.5 1 VBL / V 1.5 2
Fig.4. High side switch measurements schematic. (current and voltage conventions)
Normalised Power Derating
Fig.7. Typical on-state characteristics, Tj = 25 C. IL = f(VBL); parameter VBG; tp = 250 s
RON / mO BUK200-50Y
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
150
100
50
0
20
40
60
80 100 Tmb / C
120
140
0 1 10 VBG / V 100
Fig.5. Normalised limiting power dissipation. PD% = 100PD/PD(25 C) = f(Tmb)
IL / A BUK200-50Y
Fig.8. Typical on-state resistance, Tj = 25 C. RON = f(VBG); conditions: IL = 5 A; tp = 300 s
RON / mOhm VBG = 150 BUK200-50Y
15
200
5V 13 V
10
100 typ.
5
50
0 0 20 40 60 80 Tmb / C 100 120 140
0 -60 -20 20 60 Tj / C 100 140 180
Fig.6. Limiting continuous on-state load current. IL = f(Tmb); conditions: VIG = 5 V, VBG = 13 V
Fig.9. Typical on-state resistance, tp = 300 s. RON = f(Tj); parameter VBG; condition IL = 1 A
April 1995
6
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
BUK200-50Y
5
IG / mA
BUK200-50Y CLAMPING
100 uA
IL
BUK200-50Y
4
10 uA
3 OPERATING 2 HIGH VOLTAGE 1 QUIESCENT 0 0 10 20 30 VBG / V 40 50 60 VIG = 0 V VIG = 3 V
1 uA
100 nA
10 nA
1 nA -60 -20 20 60 Tj / C 100 140 180
Fig.10. Typical supply characteristics, 25 C. IG = f(VBG); parameter VIG
IG / mA BUK200-50Y
Fig.13. Typical off-state leakage current. IL = f(Tj); conditions: VBL = 13 V = VBG; VIG = 0 V.
II / uA BUK200-50Y
3
200
VBG / V = 2 13
150
VBG / V =
5 7
100 13
1 50
50
0 -60 -20 20 60 Tj / C 100 140 180
0 0 2 4 VIG / V 6 8
Fig.11. Typical operating supply current. IG = f(Tj); parameter VBG; condition VIG = 5 V
IB BUK200-50Y
Fig.14. Typical input characteristics, Tj = 25 C. II = f(VIG); parameter VBG
II / uA BUK200-50Y
100 uA
100
80
10 uA
60
1 uA
40
100 nA
20
10 nA -60 -20 20 60 Tj / C 100 140 180
0 0 10 20 VBG / V 30 40 50
Fig.12. Typical supply quiescent current. IB = f(Tj); condition VBG = 13 V, VIG = 0 V, VLG = 0 V
Fig.15. Typical input current, Tj = 25 C. II = f(VBG); condition VIG = 5 V
April 1995
7
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
BUK200-50Y
3.0
VIG / V
BUK200-50Y
10 uA
IS
BUK200-50Y
2.5
1 uA
VIG(ON)
2.0
1.5
VIG(OFF)
100 nA
1.0 -60 -20 20 60 Tj / C 100 140 180
10 nA -60 -20 20 60 Tj / C 100 140 180
Fig.16. Typical input threshold voltages. VIG = f(Tj); conditions VBG = 13 V, IL = 50 mA
VIG / V BUK200-50Y
Fig.19. Typical status leakage current. IS = f(Tj); conditions VSG = 5 V, VIG = VBG = 0 V
IS / uA BUK200-50Y
8.0
500
400
7.5
300
200
7.0
100
6.5 -60 -20 20 60 Tj / C 100 140 180
0 0 0.2 0.4 0.6 0.8 1 1.2 VSG / V 1.4 1.6 1.8 2
Fig.17. Typical input clamping voltage. VIG = f(Tj); conditions II = 200 A, VBG = 13 V
IS / mA BUK200-50Y
Fig.20. Typical status low characteristic, Tj = 25 C. IS = f(VSG); conditions VIG = 5 V, VBG = 13 V, IL = 0 A
VSG / V BUK200-50Y
20
1
15
0.8
0.6
10
0.4
5
0.2
0 0 2 4 VSG / V 6 8 10
0 -60 -20 20 60 Tj / C 100 140 180
Fig.18. Typical status characteristic, Tj = 25 C. IS = f(VSG); conditions VIG = VBG = 0 V
Fig.21. Typical status low voltage, VSG = f(Tj). conditions IS = 50 A, VIG = 5 V, VBG = 13 V, IL = 0 A
April 1995
8
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
BUK200-50Y
8.0
VSG / V
BUK200-50Y
47
VBG(LP) / V
BUK200-50Y
VIG / V = 7.5 5
46
off
45
0 7.0
44
on
6.5 -60 -20 20 60 Tj / C 100 140 180
43 -60 -20 20 60 Tj / C 100 140 180
Fig.22. Typical status clamping voltage, VSG = f(Tj). parameter VIG; conditions IS = 100 A, VBG = 13 V
IL(OC) / mA BUK200-50Y
Fig.25. Supply typical overvoltage thresholds. VBG(LP) = f(Tj); conditions VIG = 5 V; IL = 50 mA
VBG / V BUK200-50Y
500
65
400
max.
60
300
IG = 1 mA
typ. 200
10 uA 55
100
min.
0 -60 -20 20 60 Tj / C 100 140 180
50 -60 -20 20 60 Tj / C 100 140 180
Fig.23. Low load current detection threshold. IL(OC) = f(Tj); conditions VIG = 5 V; VBG = 13 V
VBG(TO) / V BUK200-50Y
Fig.26. Typical battery to ground clamping voltage. VBG = f(Tj); parameter IG
IL / A BUK200-50Y
5
20
4
on
3
15
off
2
10
1
5
0 -60 -20 20 60 Tj / C 100 140 180
0 -24 -20 -16 -12 VLG / V -8 -4 0
Fig.24. Supply typical undervoltage thresholds. VBG(TO) = f(Tj); conditions VIG = 3 V; IL = 50 mA
Fig.27. Typical negative load clamping characteristic. IL = f(VLG); conditions VIG = 0 V, tp = 300 s, 25 C
April 1995
9
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
BUK200-50Y
-10 -12 -14 -16
VLG / V
BUK200-50Y
0
IL / A
BUK200-50Y
IL =
-5
1 mA
-10
5A
-18 tp = 300 us -20 -22 -60 -20 20 60 Tj / C 100 140 180
-15
-20 -1.1 -0.9 -0.7 -0.5 VBL / V -0.3 -0.1
Fig.28. Typical negative load clamping voltage. VLG = f(Tj); parameter IL; condition VIG = 0 V.
VBL / V BUK200-50Y IL = tp = 300 us 60 2.5 A 1 mA 100 uA 55
Fig.31. Typical reverse diode characteristic. IL = f(VBL); conditions VIG = 0 V, Tj = 25 C
Cbl / pF BUK200-50Y
65
1000
50 -60 -20 20 60 Tj / C 100 140 180
100 0 10 20 VBL / V 30 40 50
Fig.29. Typical battery to load clamping voltage. VBL = f(Tj); parameter IL; condition IG = 5 mA.
IG / mA BUK200-50Y
Fig.32. Typical output capacitance. Tmb = 25 C Cbl = f(VBL); conditions f = 1 MHz, VIG = 0 V
IL / A VBL(TO) typ. current limiting 40 BUK200-50Y
0
50
-50
30
tp = 300 us
50 us i.e. before short circuit load trip
20
-100
10
-150 -20 -15 -10 VBG / V -5 0
0 0 2 4 6 8 10 12 VBL / V 14 16 18 20
Fig.30. Typical reverse battery characteristic. IG = f(VBG); conditions IL = 0 A, Tj = 25 C
Fig.33. Typical overload characteristic, Tmb = 25 C. IL = f(VBL); condition VBG = 13 V; parameter tp
April 1995
10
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
BUK200-50Y
45 40 35 30 25 20 15 10 5 0
IL(LIM) / A
BUK200-50Y
15 14 13 12 11 10 9 8 7 6 5
VBL(TO) / V
BUK200-50Y
-60
-20
20
60 100 Tmb / C
140
180
-60
-20
20
60 100 Tmb / C
140
180
Fig.34. Typical overload current, VBL = 8.5 V. IL = f(Tmb); conditions VBG = 13 V; tp = 300 s
VBL(TO) / V BUK200-50Y
Fig.36. Typical short circuit load threshold voltage. VBL(TO) = f(Tmb); condition VBG = 13 V
Zth j-mb / (K/W) BUK200-50Y
12
10
11
1
D= 0.5 0.2 0.1 0.1 0.05 0.02 0
P D tp D= tp T t
10
9
8 0 10 20 VBG / V 30 40
0.01 100n
T
1u
10u
100u
1m t/s
10m
100m
1
10
Fig.35. Typical short circuit load threshold voltage. VBL(TO) = f(VBG); condition Tmb = 25 C
Fig.37. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
April 1995
11
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
BUK200-50Y
4.5 max
10.3 max
1.3
3.6 2.8
mounting base
5.9 min
3.5 max not tinned
R
0.
(2)
5
m
2.4 max
15.8 max
in
5.6
0.5
12 3 45
(1)
9.75
0. 5 m in
5
R
0.6 min (4 x) 0.9 max
(5 x) NOTES (1) (2)
1.7
(4 x)
0.6
4.5
2.4
0.4
(1) M
8.2
positional accuracy of the terminals is controlled in this zone only. terminal dimensions in this zone are uncontrolled.
Fig.38. SOT263 leadform 263-01; pin 3 connected to mounting base.
Note 1. Refer to mounting instructions for TO220 envelopes. 2. Epoxy meets UL94 V0 at 1/8".
April 1995
12
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor TOPFET high side switch
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values
BUK200-50Y
This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
April 1995
13
Rev 1.000

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